"An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC ..."

Sanjay Vidhyadharan et al. (2019)

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DOI: 10.1109/VLSID.2019.00087

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type: Conference or Workshop Paper

metadata version: 2022-11-14

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Sanjay Vidhyadharan, Ramakant Ramakant, Abhay S. Vidhyadharan, A. Krishna Shyam, Mohit P. Hirpara, Surya Shankar Dan:
An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC Using Optimized Complementary TFET Devices. VLSID 2019: 401-406

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