"VLSI Implementation of Artificial Neural Network Based Digital Multiplier ..."

Ranjeet Ranade, Sanjay Bhandari, A. N. Chandorkar (1996)

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DOI: 10.1109/ICVD.1996.489620

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ranjeet Ranade, Sanjay Bhandari, A. N. Chandorkar:
VLSI Implementation of Artificial Neural Network Based Digital Multiplier and Adder. VLSI Design 1996: 318-319

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