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"Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error ..."

Monika Pokharia et al. (2024)

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DOI: 10.1109/VLSID60093.2024.00078

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-10

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Monika Pokharia, Kailash Prasad, Ravi S. Hegde, Joycee Mekie:
Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications. VLSID 2024: 431-436

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