"Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for ..."

Ashis Maity et al. (2011)

> Home

Details and statistics

DOI: 10.1109/VLSID.2011.37

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/MaityPYK11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/MaityPYK11
Ashis Maity, Amit Patra, Norihisa Yamamura, Jonathan Knight:
Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications. VLSI Design 2011: 316-321

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.