"Voltage and Temperature Scalable Gate Delay and Slew Models Including ..."

Bishnu Prasad Das et al. (2008)

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DOI: 10.1109/VLSI.2008.92

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind:
Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. VLSI Design 2008: 685-691

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