"A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale ..."

Sarvesh Bhardwaj, Sarma B. K. Vrudhula (2007)

> Home

Details and statistics

DOI: 10.1109/VLSID.2007.11

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/vlsid/BhardwajV07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsid/BhardwajV07
Sarvesh Bhardwaj, Sarma B. K. Vrudhula:
A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations. VLSI Design 2007: 589-594

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.