"Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An ..."

Swetha Ananthanarayanan, Bhupendra Singh Reniwal, Abhishek Upadhyay (2023)

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DOI: 10.1109/VLSID57277.2023.00035

access: closed

type: Conference or Workshop Paper

metadata version: 2023-04-22

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Swetha Ananthanarayanan, Bhupendra Singh Reniwal, Abhishek Upadhyay:
Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach. VLSID 2023: 109-114

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