"Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor ..."

Kea-Tiong Tang et al. (2019)

> Home

Details and statistics

DOI: 10.23919/VLSIC.2019.8778074

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/TangWYHCXKWHLLH19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/TangWYHCXKWHLLH19
Kea-Tiong Tang, Wei-Chen Wei, Zuo-Wei Yeh, Tzu-Hsiang Hsu, Yen-Cheng Chiu, Cheng-Xin Xue, Yu-Chun Kuo, Tai-Hsing Wen, Mon-Shu Ho, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Meng-Fan Chang:
Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices. VLSI Circuits 2019: 166-

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.