"A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for ..."

Chang-Kyo Lee et al. (2015)

> Home

Details and statistics

DOI: 10.1109/VLSIC.2015.7231254

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/LeeAMKELKYCKPBB15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/LeeAMKELKYCKPBB15
Chang-Kyo Lee, Min-Su Ahn, Daesik Moon, Kiho Kim, Yoon-Joo Eom, Won-Young Lee, Jongmin Kim, Sanghyuk Yoon, Baekkyu Choi, Seokhong Kwon, Joon-Young Park, Seung-Jun Bae, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin:
A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface. VLSIC 2015: 182-

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.