"1.74-µW/ch, 95.3%-accurate spike-sorting hardware based on Bayesian ..."

Zhewei Jiang et al. (2016)

> Home

Details and statistics

DOI: 10.1109/VLSIC.2016.7573468

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/JiangCKWS16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/JiangCKWS16
Zhewei Jiang, Joao Pedro Cerqueira, Seongjong Kim, Qi Wang, Mingoo Seok:
1.74-µW/ch, 95.3%-accurate spike-sorting hardware based on Bayesian decision. VLSI Circuits 2016: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.