"A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and ..."

Yong-Un Jeong et al. (2020)

> Home

Details and statistics

DOI: 10.1109/VLSICIRCUITS18222.2020.9162864

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-28

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/JeongPHK20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/JeongPHK20
Yong-Un Jeong, Hyunkyu Park, Changho Hyun, Suhwan Kim:
A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ Calibration for Memory Interfaces. VLSI Circuits 2020: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.