"Low Power Network-on-Chip Architecture Design Technique."

Tejas Musale et al. (2024)

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DOI: 10.1109/VLSI-SOC62099.2024.10767805

access: closed

type: Conference or Workshop Paper

metadata version: 2024-12-10

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Tejas Musale, Arun Ganti, Ankur Gogoi, Kanchan Manna:
Low Power Network-on-Chip Architecture Design Technique. VLSI-SoC 2024: 1-6

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