"High-Level Synthesis design approach for Number-Theoretic Multiplier."

Alexander El-Kady et al. (2022)

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DOI: 10.1109/VLSI-SOC54400.2022.9939657

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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Alexander El-Kady, Apostolos P. Fournaris, Evangelos Haleplidis, Vassilis Paliouras:
High-Level Synthesis design approach for Number-Theoretic Multiplier. VLSI-SoC 2022: 1-6

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