default search action
"Intel® Core™ i5/i7 QuickPath Interconnect receiver clocking ..."
Nasirul Chowdhury et al. (2012)
- Nasirul Chowdhury, Jeff Wight, Christopher Mozak, Nasser A. Kurd:
Intel® Core™ i5/i7 QuickPath Interconnect receiver clocking circuits and training algorithm. VLSI-DAT 2012: 1-4
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.