"Reconfigurable VLSI-Architecture of Multi-radix Maximum-A-Posteriori ..."

Rahul Shrestha, Ashutosh Sharma (2018)

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DOI: 10.1007/978-981-13-5950-7_4

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-27

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Rahul Shrestha, Ashutosh Sharma:
Reconfigurable VLSI-Architecture of Multi-radix Maximum-A-Posteriori Decoder for New Generation of Wireless Devices. VDAT 2018: 37-48

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