"Design & Development of High Speed LVDS Receiver with Cold-Spare ..."

Munish Malik, Ajay Kumar, H. S. Jatana (2017)

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DOI: 10.1007/978-981-10-7470-7_63

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-06

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Munish Malik, Ajay Kumar, H. S. Jatana:
Design & Development of High Speed LVDS Receiver with Cold-Spare Feature in SCL's 0.18 µm CMOS Process. VDAT 2017: 667-678

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