"Synthesis of LUT Based Approximating Adder Circuits with Formal Error ..."

Pooja Choudhary et al. (2022)

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DOI: 10.1007/978-3-031-21514-8_36

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-25

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  dblp key:
  - conf/vdat/ChoudharyBFS22
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Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh:
Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees. VDAT 2022: 435-449

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