"A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon ..."

Andrea Pallotta et al. (1998)

> Home

Details and statistics

DOI: 10.1117/12.321886

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/syben/PallottaCLT98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/syben/PallottaCLT98
Andrea Pallotta, Francesco Centurelli, Francesco Loriga, Alessandro Trifiletti:
A monolithic 2.5-Gb/s clock and data recovery circuit based on Silicon bipolar technology. SYBEN 1998: 183-190

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.