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"A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive ..."

Hao-I Yang et al. (2011)

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DOI: 10.1109/SOCC.2011.6085080

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  dblp key:
  - conf/socc/YangYHLLCCLCCHJLLLSWLH11
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  - https://dblp.org/rec/conf/socc/YangYHLLCCLCCHJLLLSWLH11
Hao-I Yang, Shih-Chi Yang, Mao-Chih Hsia, Yung-Wei Lin, Yi-Wei Lin, Chien-Hen Chen, Chi-Shin Chang, Geng-Cing Lin, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control. SoCC 2011: 197-200

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