"Architecture and Implementation of Power and Area Efficient Receiver ..."

Hongjiang Song (2006)

> Home

Details and statistics

DOI: 10.1109/SOCC.2006.283840

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/socc/Song06a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/socc/Song06a
Hongjiang Song:
Architecture and Implementation of Power and Area Efficient Receiver Equalization Circuit for High-Speed Serial Data Communication. SoCC 2006: 43-46

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.