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"A 2.7-Gb/s Clock and Data Recovery Circuit Based on D/PLL."
You-Sheng Lin, Miao-Shan Li, Ching-Yuan Yang (2019)
- You-Sheng Lin, Miao-Shan Li, Ching-Yuan Yang:
A 2.7-Gb/s Clock and Data Recovery Circuit Based on D/PLL. SoCC 2019: 284-288
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