"High-Performance On-Chip Interconnect Circuit Technologies for sub-65nm CMOS."

Himanshu Kaul (2005)

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DOI: 10.1109/SOCC.2005.1554522

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type: Conference or Workshop Paper

metadata version: 2017-05-23

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Himanshu Kaul:
High-Performance On-Chip Interconnect Circuit Technologies for sub-65nm CMOS. SoCC 2005: 324

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