default search action
"Low-power on-chip bus architecture using dynamic relative delays."
Maged Ghoneima, Yehea I. Ismail (2004)
- Maged Ghoneima, Yehea I. Ismail:
Low-power on-chip bus architecture using dynamic relative delays. SoCC 2004: 233-236
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.