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"P4-DPLL: accelerating SAT solving using switching ASICs."

Jinghui Jiang et al. (2022)

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DOI: 10.1145/3528082.3544835

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-27

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  dblp key:
  - conf/sigcomm/JiangHXTS22
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  - https://dblp.org/rec/conf/sigcomm/JiangHXTS22
Jinghui Jiang, Zhenpei Huang, Qiao Xiang, Lu Tang, Jiwu Shu:
P4-DPLL: accelerating SAT solving using switching ASICs. FFSPIN@SIGCOMM 2022: 24-30

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