"FPGA architecture for static background subtraction in real time."

Jozias Oliveira et al. (2006)

> Home

Details and statistics

DOI: 10.1145/1150343.1150356

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/sbcci/OliveiraPFMS06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/sbcci/OliveiraPFMS06
Jozias Oliveira, André Printes, R. C. S. Freire, Elmar U. K. Melcher, Ivan S. S. Silva:
FPGA architecture for static background subtraction in real time. SBCCI 2006: 26-31

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.