"A real-time bit-serial rank filter implementation using Xilinx FPGA."

Chang Choo, Punam Verma (2008)

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DOI: 10.1117/12.765789

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Chang Choo, Punam Verma:
A real-time bit-serial rank filter implementation using Xilinx FPGA. Real-Time Image Processing 2008: 68110F

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