"FASE: An Open Run-Time Reconfigurable FPGA Architecture for ..."

Sumanta Chaudhuri et al. (2006)

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DOI: 10.1109/RECONF.2006.307752

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst:
FASE: An Open Run-Time Reconfigurable FPGA Architecture for Tamper-Resistant and Secure Embedded Systems. ReConFig 2006: 47-55

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