"FPGA hardware implementation of Q-learning algorithm with low resource ..."

Xiaojuan Liu, Jietao Diao, Nan Li (2022)

> Home

Details and statistics

DOI: 10.1145/3549179.3549181

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/pris2/LiuD022
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/pris2/LiuD022
Xiaojuan Liu, Jietao Diao, Nan Li:
FPGA hardware implementation of Q-learning algorithm with low resource consumption. PRIS 2022: 8-13

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.