"500 MHz CMOS 28-nm Floating Point Arithmetic Unit for 32-Bit RISC-V ..."

Mattia Tambaro et al. (2024)

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DOI: 10.1109/PRIME61930.2024.10559675

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

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Mattia Tambaro, Silvia Ceopi, Andrea Gallacci, Andrea La Gala, Mirco Malanchini, Marcello De Matteis:
500 MHz CMOS 28-nm Floating Point Arithmetic Unit for 32-Bit RISC-V Microprocessors. PRIME 2024: 1-4

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