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"Dynamic Complexity Tuning for Hardware-Aware Probabilistic Circuits."

Laura Isabel Galindez Olascoaga et al. (2020)

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DOI: 10.1007/978-3-030-66770-2_21

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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  dblp key:
  - conf/pkdd/OlascoagaMSV20
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  - https://dblp.org/rec/conf/pkdd/OlascoagaMSV20
Laura Isabel Galindez Olascoaga, Wannes Meert, Nimish Shah, Marian Verhelst:
Dynamic Complexity Tuning for Hardware-Aware Probabilistic Circuits. IoT Streams/ITEM@PKDD/ECML 2020: 283-295

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