"Architecture, Design, and Verification of an 18 Million Transistor Digital ..."

Santanu Dutta (2000)

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DOI: 10.1007/3-540-45373-3_24

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Santanu Dutta:
Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip. PATMOS 2000: 225-232

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