"Folding Memory Shared Processor Array (FMSPA) Architecture for Channel ..."

Savitri Galih et al. (2011)

> Home

Details and statistics

DOI: 10.1109/PARELEC.2011.25

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/parelec/GalihAKI11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/parelec/GalihAKI11
Savitri Galih, Trio Adiono, Adit Kurniawan, Iskandar:
Folding Memory Shared Processor Array (FMSPA) Architecture for Channel Estimation of Downlink OFDMA IEEE 802.16e System. PARELEC 2011: 173-178

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.