"An Implementation of Parallel 1-D FFT Using SSE3 Instructions on Dual-Core ..."

Daisuke Takahashi (2006)

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DOI: 10.1007/978-3-540-75755-9_135

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

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Daisuke Takahashi:
An Implementation of Parallel 1-D FFT Using SSE3 Instructions on Dual-Core Processors. PARA 2006: 1178-1187

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