"FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed ..."

Noriaki Kaneda et al. (2020)

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DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2020-05-18

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  dblp key:
  - conf/ofc/KanedaZCMFBVH30
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  - https://dblp.org/rec/conf/ofc/KanedaZCMFBVH30
Noriaki Kaneda, Ziyi Zhu, Chun-Yen Chuang, Amitkumar Mahadevan, Bob Farah, Keren Bergman, Doutje T. van Veen, Vincent Houtsma:
FPGA Implementation of Deep Neural Network Based Equalizers for High-Speed PON. OFC 2020: 1-3

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