"A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for ..."

Ahmed Kamaleldin et al. (2017)

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DOI: 10.1109/NGCAS.2017.17

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-16

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Ahmed Kamaleldin, Islam Ahmed, Abdulfattah Mohammad Obeid, Ahmed Shalash, Yehea Ismail, Hassan Mostafa:
A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA. NGCAS 2017: 281-284

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