"Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic ..."

Christophe Layer et al. (2015)

> Home

Details and statistics

DOI: 10.1109/NEWCAS.2015.7181999

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/newcas/LayerJGBPBJD15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/newcas/LayerJGBPBJD15
Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny:
Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks. NEWCAS 2015: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.