"Interleaved logic-in-memory architecture for energy-efficient fine-grained ..."

Kai Yang, Robert Karam, Swarup Bhunia (2017)

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DOI: 10.1109/MWSCAS.2017.8052947

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Kai Yang, Robert Karam, Swarup Bhunia:
Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing. MWSCAS 2017: 409-412

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