"All-Pass Time Delay Circuit Magnitude Response optimization Using ..."

Norbert Herencsar et al. (2018)

> Home

Details and statistics

DOI: 10.1109/MWSCAS.2018.8624059

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/mwscas/HerencsarKTMC18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/mwscas/HerencsarKTMC18
Norbert Herencsar, Aslihan Kartci, Esteban Tlelo-Cuautle, Bilgin Metin, Oguzhan Cicekoglu:
All-Pass Time Delay Circuit Magnitude Response optimization Using Fractional-Order Capacitor. MWSCAS 2018: 129-132

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.