"Simultaneous Clock Wire Sizing and Shield Insertion for Minimizing Routing ..."

Yoonsang Song et al. (2023)

> Home

Details and statistics

DOI: 10.1109/MLCAD58807.2023.10299861

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/mlcad/SongCLS23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/mlcad/SongCLS23
Yoonsang Song, Gangmin Cho, Wonjae Lee, Youngsoo Shin:
Simultaneous Clock Wire Sizing and Shield Insertion for Minimizing Routing Blockage. MLCAD 2023: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.