"Synthesizing Formal Models of Hardware from RTL for Efficient Verification ..."

Yao Hsiao et al. (2021)

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DOI: 10.1145/3466752.3480087

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-19

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Yao Hsiao, Dominic P. Mulligan, Nikos Nikoleris, Gustavo Petri, Caroline Trippel:
Synthesizing Formal Models of Hardware from RTL for Efficient Verification of Memory Model Implementations. MICRO 2021: 679-694

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