"Cost-efficient Formal Block Verification for ASIC Design."

Klaus Winkelmann et al. (2003)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2012-06-28

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  - https://dblp.org/rec/conf/mbmv/WinkelmannTSF03
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey:
Cost-efficient Formal Block Verification for ASIC Design. MBMV 2003: 184-188

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