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"CMOS high-speed, high-precision timing generator for 4.266-Gbps memory ..."

Masakatsu Suda et al. (2005)

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DOI: 10.1109/TEST.2005.1584050

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
  - conf/itc/SudaYOKSW05
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  persistent URL:
  - https://dblp.org/rec/conf/itc/SudaYOKSW05
Masakatsu Suda, Kazuhiro Yamamoto, Toshiyuki Okayasu, Shusuke Kantake, Satoshi Sudou, Daisuke Watanabe:
CMOS high-speed, high-precision timing generator for 4.266-Gbps memory test system. ITC 2005: 9

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