"Test cost reduction by at-speed BISR for embedded DRAMs."

Yoshihiro Nagura et al. (2001)

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DOI: 10.1109/TEST.2001.966632

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Yoshihiro Nagura, Michael Mullins, Anthony Sauvageau, Yoshinoro Fujiwara, Katsuya Furue, Ryuji Ohmura, Tatsunori Komoike, Takenori Okitaka, Tetsushi Tanizaki, Katsumi Dosaka, Kazutami Arimoto, Yukiyoshi Koda, Tetsuo Tada:
Test cost reduction by at-speed BISR for embedded DRAMs. ITC 2001: 182-187

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