"Practical Test Architecture Optimization for System-on-a-Chip under ..."

Makoto Sugihara, Kazuaki J. Murakami, Yusuke Matsunaga (2004)

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DOI: 10.1109/ISVLSI.2004.1339527

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Makoto Sugihara, Kazuaki J. Murakami, Yusuke Matsunaga:
Practical Test Architecture Optimization for System-on-a-Chip under Floorplanning Constraints. ISVLSI 2004: 179-186

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