default search action
"Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology."
A. S. Seyedi et al. (2006)
- A. S. Seyedi, S. H. Rasouli, Amir Amirabadi, Ali Afzali-Kusha:
Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology. ISVLSI 2006: 373-377
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.