"A 30mW 12b 40MS/s subranging ADC with a high-gain offset-canceling ..."

Yasuhide Shimizu et al. (2006)

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DOI: 10.1109/ISSCC.2006.1696120

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-12

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Yasuhide Shimizu, Shigemitsu Murayama, Kohhei Kudoh, Hiroaki Yatsuda, Akihide Ogawa:
A 30mW 12b 40MS/s subranging ADC with a high-gain offset-canceling positive-feedback amplifier in 90nm digital CMOS. ISSCC 2006: 802-811

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