"A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy ..."

Shigeki Ohbayashi et al. (2007)

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DOI: 10.1109/ISSCC.2007.373507

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono, Yuji Oda, Susumu Imaoka, Keiichi Usui, Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Masakazu Okada, Atsushi Ishii, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara:
A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die. ISSCC 2007: 488-617

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