"13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a ..."

Jinhyung Lee et al. (2024)

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DOI: 10.1109/ISSCC49657.2024.10454440

access: closed

type: Conference or Workshop Paper

metadata version: 2024-09-18

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  - conf/isscc/LeeCLLPOJJCLYCOMPCKYKJKLJPKKOKJKKKYYL24
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  - https://dblp.org/rec/conf/isscc/LeeCLLPOJJCLYCOMPCKYKJKLJPKKOKJKKKYYL24
Jinhyung Lee, Kyungjun Cho, Chang Kwon Lee, Yeonho Lee, Jae-Hyung Park, Su-Hyun Oh, Yucheon Ju, Chunseok Jeong, Ho Sung Cho, Jaeseung Lee, Tae-Sik Yun, Jin Hee Cho, Sangmuk Oh, Junil Moon, Young-Jun Park, Hong-Seok Choi, In-Keun Kim, Seung Min Yang, Sun-Yeol Kim, Jaemin Jang, Jinwook Kim, Seong-Hee Lee, Younghyun Jeon, Juhyung Park, Tae-Kyun Kim, Dongyoon Ka, Sanghoon Oh, Jinse Kim, Junyeol Jeon, Seonhong Kim, Kyeong Tae Kim, Taeho Kim, Hyeonjin Yang, Dongju Yang, Minseop Lee, Heewoong Song, Dongwook Jang, Junghyun Shin, Hyunsik Kim, Chang-Ki Baek, Hajun Jeong, Jongchan Yoon, Seung-Kyun Lim, Kyo Yun Lee, Young Jun Koo, Myeong-Jae Park, Joohwan Cho, Jonghwan Kim:
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization. ISSCC 2024: 238-240

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