"A 1-to-2GHz 4-Phase On-Chip Clock Generator with Timing-Margin Test ..."

Shunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno (2007)

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DOI: 10.1109/ISSCC.2007.373350

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Shunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno:
A 1-to-2GHz 4-Phase On-Chip Clock Generator with Timing-Margin Test Capability. ISSCC 2007: 174-594

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