"3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable ..."

Delong Cui et al. (2016)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2016.7417905

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/CuiZHNCRZMC16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/CuiZHNCRZMC16
Delong Cui, Heng Zhang, Nick Huang, Ali Nazemi, Burak Çatli, Hyo-Gyuem Rhew, Bo Zhang, Afshin Momtaz, Jun Cao:
3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS. ISSCC 2016: 58-59

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.